Draft:Racyics
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Submission declined on 4 March 2026 by SocDoneLeft (talk).
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This draft has been resubmitted and is currently awaiting re-review. |  |
Comment: WP:SOLUTION. Rewrite in WP:NPOV and resubmit. SocDoneLeft (talk) 18:51, 4 March 2026 (UTC)
- Comment: In accordance with the Wikimedia Foundation's Terms of Use, I disclose that I have been paid by my employer for my contributions to this article. Cipher11 (talk) 12:48, 9 December 2025 (UTC)
Company type | Private |
|---|---|
| Industry | Semiconductors |
| Founded | 2009 |
| Founder |
|
| Headquarters | , |
Number of locations | |
| Website | racyics |
Racyics GmbH is a German semiconductor design company based in Dresden, Germany.[1] The company provides design services for analog, digital and mixed-signal integrated circuits, including low-power system-on-chip designs.[2][3]
History
Racyics was founded in 2009 as a spin-off of the Technische Universität Dresden.[4] The founders and core team had worked together at TU Dresden since 2003 in research projects related to low-power system-on-chip design and mixed-signal integrated circuits.[2]
According to TU Dresden, the company originated from the Chair of Highly-Parallel VLSI Systems and Neuro-Microelectronics and works in the field of low-power SoC implementation in CMOS technologies.[4]
Racyics is headquartered in Dresden and has additional German sites in Frankfurt am Main and Duisburg.[5][6]
Business activities
Racyics provides implementation and design services for integrated circuits, including ASIC and system-on-chip design, custom intellectual property and foundry-related services.[7][6] The company has worked with GlobalFoundries' 22FDX semiconductor technology.[3]
In 2017, Racyics launched makeChip, a hosted design environment for integrated-circuit projects based on GlobalFoundries' 22FDX process technology.[3][8][9] A 2025 position paper on European university chip-design enablement cited makeChip by Racyics as an example of a commercial cloud-based design-enablement platform.[10]
The company has developed adaptive body-biasing technology for low-voltage designs in 22FDX. In 2018, eeNews Europe reported that Racyics had carried out power-performance-area studies for Cortex- and RISC-V-based microcontrollers operating at supply voltages down to 0.4 V, and had taped out a Cortex-based test chip in December 2017 for silicon validation of its adaptive body-bias design approach.[11]
SemiIPHub lists Racyics IP related to power management and adaptive body biasing for GlobalFoundries' 22FDX platform.[12][13] In 2022, Design & Reuse reported that Robert Bosch GmbH had selected Racyics' adaptive-body-biasing solution for automotive products in GlobalFoundries' 22FDX technology.[14]
Research and collaborative projects
Racyics has participated in semiconductor research and development projects with academic and industrial partners.
In 2021, TU Dresden, the University of Manchester, Racyics and GlobalFoundries announced the tape-out of the SpiNNaker2 neuromorphic computing chip. According to TU Dresden, the chip used Racyics' adaptive body-bias IP and its makeChip design environment.[15]
The company was listed in a project profile of the German Federal Ministry for Economic Affairs as part of the IPCEI Microelectronics project "Universal 22FDX platform for IoT products and Industry 4.0".[1]
Racyics is also listed among the project partners of QSolid, a German initiative to build a quantum computer based on superconducting circuits.[16][17]
Racyics is listed as a consortium partner in EdgeVision, a RUBIN alliance in the Dresden–Zittau region focused on low-power computing, visualization and sensor platforms.[18] A 2024 IEEE System-on-Chip Conference paper by Racyics authors described the EdgeVision SoC as based on GlobalFoundries 22nm FDX technology and using adaptive body biasing.[19] Arm reported that Racyics presented an EdgeVision image-processing demo at Embedded World 2026.[20]
A 2025 ESSERC conference paper on cryogenic FD-SOI transistors included authors affiliated with Racyics, GlobalFoundries, Fraunhofer IPMS, AdMOS and Forschungszentrum Jülich.[21]
References
- ^ a b "Racyics GmbH - Universal 22FDX platform for IoT products and Industry 4.0" (PDF). Important Projects of Common European Interest on Microelectronics. January 2021. Retrieved 2026-03-24.
- ^ a b "Stromsparende Advanced-node-Schaltkreise". Wirtschaftsförderung Sachsen. Retrieved 2026-03-24.
- ^ a b c "Racyics startet 'makeChip' Design Service Plattform für GLOBALFOUNDRIES' 22FDX® Technologie". GlobalFoundries. 2017-05-10. Retrieved 2026-03-24.
- ^ a b "Overview of our spinoff companies". Technische Universität Dresden. Retrieved 2026-03-24.
- ^ "Racyics GmbH". Silicon Saxony. Retrieved 2026-05-26.
- ^ a b "Racyics". Arm Partner Ecosystem Catalog. Arm. Retrieved 2026-05-26.
- ^ "Racyics, your go-to design partner" (PDF). HiPEAC Info. No. 73. 2024-10-16. p. 34. Retrieved 2026-03-24.
- ^ "Racyics launches makeChip design service platform for GlobalFoundries 22FDX technology". Semiconductor Digest. 2017-05-10. Retrieved 2026-03-24.
- ^ "Racyics Launches "makeChip" Design Service Platform for GLOBALFOUNDRIES' 22FDX Technology". Design & Reuse. 2017-05-10. Retrieved 2026-05-26.
- ^ Krupp, Lukas; O'Connor, Ian; Benini, Luca; Studer, Christoph; Rodrigues, Joachim; Wehn, Norbert (2025). "Improving Chip Design Enablement for Universities in Europe – A Position Paper". arXiv:2508.14907 [cs.AR].
- ^ Clarke, Peter (2018-01-11). "Dresden firm takes FDSOI down to 0.4V". eeNews Europe. Retrieved 2026-05-26.
- ^ "Power and Clock Generation IP - GLOBALFOUNDRIES® 22FDX®". SemiIPHub. Retrieved 2026-05-26.
- ^ "Adaptive Body Bias Generator - GLOBALFOUNDRIES 22FDX". SemiIPHub. Retrieved 2026-05-26.
- ^ "Racyics wins new automotive customer for its GF 22FDX Adaptive-Body-Biasing solution". Design & Reuse. 2022-08-29. Retrieved 2026-05-26.
- ^ "SpiNNaker2: TU Dresden, University of Manchester and Globalfoundries announce a Breakthrough in AI Cloud Systems". Technische Universität Dresden. 2021-07-27. Retrieved 2026-03-24.
- ^ "Project Partners". QSolid. Retrieved 2026-03-24.
- ^ "QSolid – auf dem Weg zum ersten deutschen Quantencomputer". Forschungszentrum Jülich. 2022-03-09. Retrieved 2026-03-24.
- ^ "EdgeVision – Hochperformante ultralow-power Edge-AI, Visualisierungs- und Sensor-Plattform für sichere IoT und MenschTechnik-Interaktion – Dresden" (in German). Innovation & Strukturwandel. Retrieved 2026-03-31.
- ^ Yayla, Mikail; Dmello, Clifford Leon; Ellguth, Georg; Steeb, Uwe; Leuchter, Tim; Pietzsch, Marcus; Eisenreich, Holger (2024). EdgeVision SoC: PPA-Impact of RTL-level Modifications. 2024 IEEE 37th International System-on-Chip Conference (SOCC). IEEE. doi:10.1109/SOCC62300.2024.10737776.
- ^ "Arm at Embedded World 2026: Powering intelligent edge AI systems at scale". Arm Newsroom. 2026-03-09. Retrieved 2026-04-23.
- ^ Cryogenic Performance Assessment of FD-SOI Transistors with Counter-Doped Channel. European Solid-State Electronics Research Conference. Fraunhofer-Publica. 2025. doi:10.1109/ESSERC66193.2025.11214120. Retrieved 2026-05-26.
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